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Chip Startup Promises Revolutionary TDM/IP Convergence
|19 декабря 2008|
A little-known startup that has been working with IBM for the past three years on a new species of Carrier Ethernet-based telecom chip has taken the wraps off what it claims is the world’s first single chip 2.5 Gb/s carrier transport device.
The chip, code-named Griffin, is a Layer 1/2 offering Siverge Networks says melds legacy telecom with packet communications.
The company, legally a U.S. entity but with headquarters and R&D in Herzliya, Israel, claims its new chip can “handle any port, service, channelization and functionality, in both legacy and packet networks.” The device reportedly will enable the first 10 Gb/s, fully channelized “any service, any protocol” linecards, with 16 times more bandwidth and density than the high end of channelized linecards that exist today, the company says. One Griffin chip, initially offered in four variations with a trio of speed grades each, replaces as many as 30 components now needed to perform the same function.
Target applications for the devices range from packet-based transport systems and multi-service switches to add-drop multiplexer/multi-service provisioning, platform (ADM/MSPP) systems, switches and routers. The devices also simultaneously support 2G, 2.5G, 3G, “and beyond” wireless transport backhaul systems, Siverge adds, as well as bisynchronous protocol/radio network controllers (BSC/RNC).
But it looks like Siverge doesn’t have any firm contracts for its new chips. That’s hardly a surprise because initial samples for testing won’t go to manufacturers until 1Q09, with commercial quantities in the second half priced at between $200 and $1,200 per chip (depending on the device, its speed and feature set) in OEM quantities of 10,000. However, in the past, the young company identified many of its target customer prospects, a top-tier group that includes Alcatel-Lucent, Nokia-Siemens, Ericsson and ZTE.
“Siverge is committed to enabling the transition from today’s SONET/SDH infrastructure to Carrier Ethernet in next-generation networks for fixed and mobile transport and backhauling applications,” says Siverge President and CTO Moshe De-Leon. “Our highly integrated family of carrier transport devices -- starting with Griffin and then expanding to include future native Ethernet solutions across a broad range of existing and emerging applications -- will provide revolutionary building blocks for this transition. Our new approach will help the industry converge and consolidate networks, systems and linecards while managing and migrating all legacy protocols (e.g., ATM, FR, PPP, SONET/SDH and PDH) into a unified MPLS or Ethernet switching system over Carrier Ethernet transport network.”
Earlier this year, Siverge said it was using IBM development tools and subcomponent libraries to develop its devices. After the devices were crafted, IBM also was to be responsible for their physical design and manufacture at its microelectronics facilities in East Fishkill, N.Y.
The company has released full details of its products, starting with VLSI core technology and circuitry it calls the “Siverge Matrix,” described as a centralized-resource, shared bit-stream processing engine. The Matrix drives four flavors of Griffin chips in 2.5 Gb/s, 622 Mb/s and 155 Mb/s speed grades. The flagship of those offerings is the SV3640/1/2 Universal Convergence Transport Device, which melds packet, cell and TDM services in a single high-performance device.
The other three Griffin chips are devices that provide more specific functionality and cost-optimized solutions for TDM-only applications (SV3600/1/2), legacy-protocol applications (SV3610/1/2) and “Ethernet-over-Anything” applications (SV3620/1/2).